The present invention generally relates to analog-to-digital converters, and more particularly to an improved analog-to-digital converter which provides a very high resolution conversion of very rapidly changing analog signals into a quantized digital form.
Historically, very high speed analog-to-digital converters have used parallel conversion techniques. Examples of these are described in U.S. Pat. No. 2,869,079 to Stallin et al. and U.S. Pat. No. 3,597,761 to Fraschilla et al. While such converters are extremely fast, the parallel technique requires an individual comparator and reference for each of the individual levels possible in the output data word. As a practical matter, such conversions are limited to relatively low resolution applications since the number of comparators required increases exponentially with the number of bits converted.
Very high resolution analog-to-digital conversions have used ramp or slope type converters. While these converters are very accurate, they tend to be slow and are used primarily for slowly varying quantities. The most common form of converter used for high speed, high resolution analog-to-digital conversions is the successive approximation form. An example of this type of conversion is described in U.S. Pat. No. 3,781,871 to Mattern. There are basically two limitations inherent in this type of converter. First, the successive approximation analog-to-digital converter is required to allow one full settling time of the digital-to-analog converter comparator combination to the full resolution of the complete system for each bit to be converted. Second, the successive approximation analog-to-digital converter must be supplied with a non-varying signal during its conversion sequence. This means that the converter must be preceded by an analog sample and hold amplifier. The sample and hold amplifier must meet and preferably exceed the accuracy of the converter itself.